Click here for a pdf copy of my resume.

Education:

• The University of Texas at Austin, Aug 2008 – May 2013
  • PhD Electrical Engineering (Solid-state Electronics)
    • Advisor: Deji Akinwande
    • Dissertation: Nanoscale Graphene for RF Circuits and Systems
  • MS Electrical Engineering (Electromagnetics & Acoustics)
• Rose-Hulman Institute of Technology, Sep 2005 – May 2008
  • BS Electrical Engineering, minors in Mathematics and Spanish

Industry Experience:

• Wolfspeed (formerly Cree), Beijing, CN, Sep 2021 – July 2022. SiC Bare Die Applications Engineer. Application notes, customer support, modeling and team leadership.
• Wolfspeed (formerly Cree), Durham, NC. June 2019 – Aug 2021. SiC Systems Engineer. Power electronics, modeling, roadmap development, new technology development, data analytics.
• Texas Instruments, Dallas, TX. Aug 2016 – May 2019. Module Technologist. Power electronics, packaging, magnetics.
• Texas Instruments, Dallas, TX. Oct 2013 – Aug 2016. R&D Engineer. Power electronics, LIDAR, photonics, millimeter wave systems.
• Texas Instruments, Dallas, TX. May 2011 – Aug 2011. R&D intern. Millimeter wave systems for automotive applications.
• Texas Instruments, Dallas, TX. May 2009 – Aug 2009. OMAP intern. Signal integrity in processor applications.
• LGS Innovations, Florham Park, NJ. Intern. May 2008 – Aug 2008.
• Raytheon Technical Services Co, Indianapolis, IN. Intern. May 2007 – Aug 2007.

Journal Publications and Book Chapters:

• M. Yogeesh, K. N. Parrish, J. Lee, S. Park, L. Tao, and D. Akinwande; “Towards the Realization of Graphene Based Flexible Radio Frequency Receiver,” Electronics, vol. 4, p. 933, 2015
• K. N. Parrish, D. Akinwande, “Physics-Based Compact Graphene Device Modeling”, Book Chapter in “Micro- and Nanoelectronics: Emerging Device Challenges and Solutions”, Tomasz Brozek ed., CRC press, pp 301 – 320, 2015
• J. H. Lee, T.- J. Ha, H. Li, K. N. Parrish, M. Holt, A. Dodabalapur, R. S. Ruoff, and D. Akinwande, “25 GHz Embedded-Gate Graphene Transistors with High-K Dielectrics on Extremely Flexible Plastic Sheets” ACS Nano, August 2013.
• J. Lee, T.-J. Ha, K. N. Parrish, Sk. F. Chowdhury, L. Tao, A. Dodabalapur, and D. Akinwande, “High-performance current saturating graphene field-effect transistor with hexagonal boron nitride dielectric on flexible polymeric substrates“, IEEE Electron Devices Letters, vol 34. pp 172 – 174. Feb 2013.
• J. Lee, L. Tao, K. N. Parrish, Y. Hao, R. S. Ruoff, and D. Akinwande, “Multi-finger Flexible Graphene Field Effect Transistors with High Bendability”, Appl. Phys. Lett. 101, 252109, December 2012
• J. H. Lee, K. N. Parrish, Sk. F. Chowdhury, T.-J. Ha, Y. Hao, L. Tao, A. Dodabalapur, R. S. Ruoff, and D. Akinwande, “State-of-the-art Graphene Transistors on Hexagonal Boron Nitride, High-k, and Polymeric Films for GHz Flexible Analog Nanoelectronics”, IEEE IEDM, San Franscisco, CA (December 2012).
• M. Ramón, K. N. Parrish, S. Chowdhury, C. Magnuson, H. Movva, R. Ruoff, S. Banerjee, and D. Akinwande, “3GHz Graphene Frequency Doubler on Quartz Operating Beyond the Transit Frequency”, IEEE Trans. on Nanotech.,
• I. A. D. Williamson, K. N. Parrish, A. Alù, D. Akinwande, “Dielectric Interconnects for THz Chip-to-Chip Communications,” 14th Annual TechCon, Austin, TX, USA, (September 2012).
• K. N. Parrish, M. E. Ramón, S. K. Banerjee, and D. Akinwande, “A Compact Model for Graphene FETs for Linear and Non-linear Circuit”, IEEE SISPAD, Denver, CO, (September 2012).
• K. N. Parrish, D. Akinwande, “An exactly solvable model for the graphene transistor in the quantum capacitance limit” Applied Physics Letters 101, 053501 (July 2012).
• D. Akinwande, K. N. Parrish, M. E. Ramon, L. Tao, S. Banerjee, “Wafer-scale graphene technology and GHz nanoelectronics” (invited), 2011 International Semiconductor Device Research Symposium (ISDRS), December 2011
• K. N. Parrish, D. Akinwande, “Even-odd symmetry and the conversion efficiency of ideal and practical graphene transistor frequency multipliers”, Applied Physics Letters 99, 223512 (November 2011)
• F. Gutierrez, S. Agarwal, K. Parrish, T. S. Rappaport, On-Chip Integrated Antenna Structures in CMOS for 60 GHz WPAN Systems, IEEE Journal on Selected Areas in Communications, Vol. 27, Issue 8, pp.1367-1378 (October 2009).

Authored Magazine & Blog Articles:

• S. W. Butler and K. N. Parrish, “Digital Twins: The Real Opportunities [Industry Pulse],” in IEEE Power Electronics Magazine, vol. 11, no. 2, pp. 80-107, June 2024
• K. N. Parrish, “Report From Beijing [Industry Pulse],” in IEEE Power Electronics Magazine, vol. 11, no. 1, pp. 74-75, March 2024
• K. N. Parrish, “On the Shoulders of Silicon Giants: How SiC is Ramping Capacity, and Where Si Fits in [Industry Pulse],” in IEEE Power Electronics Magazine, vol. 10, no. 4, pp. 66-68, Dec. 2023
• K. N. Parrish and S. W. Butler, “Consumer EV Standards and Voltage Trends [Industry Pulse],” in IEEE Power Electronics Magazine, vol. 10, no. 3, pp. 68-72, Sept. 2023 “”, IEEE Power Electronics Magazine, pp 68-72, September 2023
• K. A. Kim, Y. Liu, S. W. Butler, S. Narasimhan, K. N. Parrish, M. B. Gebremariam, C. DiMarino, “Women in IEEE PELS,” in IEEE Power Electronics Magazine, vol. 10, no. 3, pp. 76-83, Sept. 2023
• S. W. Butler and K. N. Parrish, “WSTS Introduces New Category: WBG Discrete Power Products [Industry Pulse],” in IEEE Power Electronics Magazine, vol. 10, no. 2, pp. 88-91, June 2023
• K. N. Parrish, “Celebrating the Tenth Anniversary of IEEE PELS WIE Committee [Women in Engineering],” in IEEE Power Electronics Magazine, vol. 10, no. 1, pp. 68-70, March 2023
• K. N. Parrish, “Blockchain and Bitcoin: What It Means for Power Electronics [Industry Pulse],” in IEEE Power Electronics Magazine, vol. 10, no. 1, pp. 78-80, March 2023
• K. N. Parrish, “New U.S. Legislation and Its Impact [Industry Pulse],” in IEEE Power Electronics Magazine, vol. 9, no. 4, pp. 84-85, Dec. 2022,
• “Why high-temperature storage testing matters for your buck converter“, TI E2E article, April 2018.

Conferences & Seminars:

• IEEE Power Electronics Society (PELS) Students & Young Professionals Symposium. Speaker.
  • Building Momentum in Industry: Skills to Excel During Your First 5 Years
• IEEE Region 3 SoutheastCon, Virtual, 2021. Panelist for Trailblazers: Young Professionals Townhall.
  • Watch the event for free here
• International Microelectronics Assembly and Packaging Society Conference (IMAPS), Boston, MA, 2019. Session Chair.
• Applied Power Electronics Conference (APEC), Tampa, FL, 2017. Attendee.
• South by Southwest (SXSW), Austin, TX, 2015. Presenter.
  • “Under the Hood: The Tech Behind Autonomous Vehicles”
• International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Denver, CO, 2013. Presenter.
  • “A compact model for graphene FETs for linear and non-linear circuits”
• International Microwave Symposium (IMS), Montreal, QC, 2012. Attendee.

Volunteering & Leadership:

• IEEE Power Electronics Society Women in Engineering Steering Committee
  • Member: June 2021 – Present
• IEEE Eastern North Carolina Section
  • Vice-Chair: Jan 2021 – Dec 2023
  • Webmaster: Dec 2019 – Present
  • Outstanding Volunteer Achievement Award – Dec 2020
  • Women in Engineering Chair: Dec 2019 – Dec 2020
• IEEE Region 3 Young Professionals Affinity Group
  • Mentoring program chair & mentor group leader, June 2020 – Dec 2020
• High-Tech High Heels Board member & webmaster, 2014-2018.

Articles & Shoutouts:

• “Women in Engineering – Dr. Kristen N. Parrish”, DesignWorld Online, Nov 2020.
• “Self-driving cars of tomorrow“, Sharp Heels bog post, April 2015.
• “We’re already driving smart cars, so when will they be autonomous?“, interviewed on GigaOm podcast, October 2014.
• “UT ECE Alum Kristen Parrish is Driving TI’s Push Towards Autonomous Vehicles” Article and video, September 2014.

Patents:

• US Patent Application 20230013938A1: Y. Sato, K. Otake, T. Ando, J. Morroni, C. Devries, K. N. Parrish, “Integrated Circuit“
• US Patent 11855540-B2: C. Devries, K. Norell, K. N. Parrish, “Leadframe for conductive winding“, Patent filed Mar 2019, granted Dec 2023.
• US Patent Application 20200211760: J. N. Brassfield, C. Devries, K. N. Parrish, “Molded inductor with magnetic core having mold flow enhancing channels“, Patent filed Dec 2018.
• US Patent 11348808-B2: K. N. Parrish, C. Devries, “Switch-mode Converter Module“, Patent filed Dec 2017, granted Mar 2020.
• US Patent 10396016-B2: J. M. Mullenix, R. G. Massolini, K. N. Parrish, O. J. Lopez, J. A. Noquil, “Leadframe Inductor“, Patent filed Dec 2016, granted Aug 2019.

Honors & Awards:

• Elected Senior Member, IEEE, 2020
• Selected for program “Women for Technical Leadership”, Texas Instruments, 2019
• Selected to attend “Negotiating the Ideal Faculty Position” workshop at Rice University, 2011
• Analog Design Fellowship, Texas Instruments, 2011 – 2013
• Thrust Doctoral Fellowship, Cockrell School of Engineering, University of Texas at Austin, 2008 – 2013

Teaching:

• The University of Texas at Austin, Electrical Engineering; Laboratory Teaching Assistant, EE321K, Mixed Signal & Circuits, Spring 2010
• The University of Texas at Austin, General Engineering; Supplemental Teacher for M427J, Differential Equations, Fall 2009 & Fall 2010

Professional Development:

• Project Management Essentials for the Unofficial Project Manager
• Think on your Feet
• Technical Presentation Skills
• Win-Win negotiations
• Influence Management, taught by John H Davis, Professor at UT Austin
• Ray Ridley’s Power Design Workshop

Selected Academic Courses & Projects

• EE383V Radar Principles (UT-Austin)
  • “An Overview of FMCW Systems in MATLAB”. paper, presentation, and code
• EE383V Computational Electromagnetics (UT-Austin)
  • “Scattering from PEC cylinders by normally incident plane wave” (MOM paper & matlab code)
  • “Higher Order FEM Solutions for a Plane Wave Propagating Through an Inhomogeneous Dielectric” (FEM paper & matlab code)
  • “On the Accuracy and Efficiency of Split-Field, Uniaxial, and CFS Perfectly Matched Layers” (FDTD paper & fortran code)